发明名称 半導体メモリおよびシステム
摘要 <p><P>PROBLEM TO BE SOLVED: To prevent deterioration of the static noise margin of memory cells. <P>SOLUTION: A semiconductor memory comprises: real memory cells each having a latch that stores data and a real transfer transistor that is connected to an input/output node of the latch; bit lines each being connected to the input/output node through the real transfer transistor; word lines each being connected to the gate of the real transfer transistor; and precharge circuits precharging the bit lines. The precharge circuits each comprises a replica memory cell having the same structure as the real memory cell, which includes a replica transfer transistor that, at least when the real memory cells are not accessed, receives by its gate a first high-level voltage that is the same as a high-level voltage on a word line, receives by its drain a second high-level voltage, and supplies to a bit line a precharge voltage that is generated at its source. <P>COPYRIGHT: (C)2013,JPO&INPIT</p>
申请公布号 JP5789803(B2) 申请公布日期 2015.10.07
申请号 JP20110266419 申请日期 2011.12.06
申请人 发明人
分类号 G11C11/413;G11C11/41 主分类号 G11C11/413
代理机构 代理人
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