Vertical memory devices and methods of manufacturing the same

摘要

A memory device includes a plurality of channels, a plurality of first charge storage sites coupled to first sides of respective ones of the channels, and a plurality of second charge storage sites coupled to second sides of respective ones of the channels. The first charge storage sites correspond to first memory cells and the second charge storage sites coupled to second memory cells. At least one of the channels is a dummy channel not connected to a bit line, and a blocking layer is contiguously formed around the first and second charge storage sites and the channels.

主权项

1. A vertical memory device, comprising:
a plurality of channel columns including a plurality of channels extending in a first direction perpendicular to a top surface of a substrate, the channels being arranged along a third direction parallel to the top surface of the substrate; a plurality of charge storage structures including a plurality of tunnel insulation layer patterns, a plurality of charge storage layer patterns, and a blocking layer pattern respectively, the plurality of tunnel insulation layer patterns and the plurality of charge storage layer patterns being sequentially stacked on sidewalls of respective ones of the channels, the blocking layer pattern surrounding the charge storage layer patterns formed on the sidewalls of the channels included in each channel column; and a plurality of gate electrodes spaced apart from each other in the first direction on the sidewalls of each charge storage structure.