发明名称 Semiconductor device and method of manufacturing the same
摘要 A semiconductor device includes a semiconductor substrate having a plurality of isolation regions, a plurality of trenches, where each of the plurality of trenches is formed in a corresponding isolation region, of the plurality of isolation regions, and where the plurality of trenches are arranged, in parallel, along a first direction, a plurality of gate lines formed on the semiconductor substrate in a second direction crossing the plurality of trenches, an insulating layer formed between each of the plurality of gate lines, a first air gap formed in at least one of the plurality of trenches, the first air gap extending in the first direction, and a second air gap formed in at least one of the insulating layers, the second air gap extending in the second direction.
申请公布号 US9153475(B2) 申请公布日期 2015.10.06
申请号 US201213599775 申请日期 2012.08.30
申请人 SK Hynix Inc. 发明人 Jung Woo Duck;Kim Sung Soon;Song Ju Il
分类号 H01L21/764;H01L27/115 主分类号 H01L21/764
代理机构 IP & T Group LLP 代理人 IP & T Group LLP
主权项 1. A method of manufacturing a semiconductor device, the method comprising: forming, in a first direction, trenches in isolation regions of a semiconductor substrate; forming an SOG layer over the semiconductor substrate to fill the trenches; performing a heat treatment process to cure a top portion of the SOG layer to form a cured portion of the SOG layer; curing only the top portion of the SOG layer, at a temperature ranging from room temperature to 600° C., to form the cured portion of the SOG layer; performing, at a temperature ranging between 100° C. and 1100° C., furnace annealing or rapid thermal annealing on the SOG layer using a wet atmosphere, a N2 atmosphere, an O2 atmosphere, a NO atmosphere, or an N2O; etching the SOG layer so that a top surface of the cured portion of the SOG layer is at substantially a middle height of each of the gate lines; forming gate lines, in a second direction crossing the first direction, over the isolation layers and over active regions defined between the isolation layers; forming first air gaps, extending in the first direction, by performing an etching process to remove at least a portion of each of the isolation layers; and forming an insulating layer between the gate lines so that an air gap is formed in the insulating layer, wherein the air gap extends in the first direction in the trenches and extends in the second direction between the gate lines.
地址 Gyeonggi-do KR