Multiple patterning technology method and system for achieving minimal pattern mismatch

摘要

The present disclosure provides for many different embodiments of a multiple patterning technology method and system. An exemplary method includes receiving a pattern layout having a plurality of features; coloring each of the plurality of features one of at least two colors, thereby forming a colored pattern layout, wherein the coloring includes coloring match-sensitive features a same color; and fabricating at least two masks with the features of the colored pattern layout, wherein each mask includes features of a single color.

主权项

1. A method comprising:
receiving a pattern layout having a plurality of features forming an integrated circuit device; identifying a first transistor and a second transistor in the pattern layout that have a desired similar performance in the integrated circuit device when fabricated, wherein the desired similar performance in the integrated circuit device is one of threshold voltage, saturation current, leakage current, parasitic capacitance, parasitic resistance, and combinations thereof; identifying a first feature of the first transistor and a second feature of the second transistor, wherein the first and second features have a desired similar performance for the first feature's device performance characteristic and the second feature's device performance characteristic in the fabricated device of the integrated circuit device; coloring, by a computer, each of the plurality of features of the pattern layout one of at least two colors, thereby forming a colored pattern layout, wherein the coloring includes coloring the identified first and second features the same color; and fabricating at least two masks with the features of the colored pattern layout, wherein each mask includes features of a single color; performing a first lithography process to image the first and second features using a first mask of the at least two masks; and performing a second lithography process to image another feature defined by the pattern layout using a second mask of the at least two masks.