发明名称 Method for manufacturing a wiring board
摘要 A manufacturing method of a wiring board and a semiconductor device at low cost and by a simple process, without performing complicated steps many times is proposed. Furthermore, a manufacturing method of a wiring board at low cost and with fewer adverse effects on the environment, and a manufacturing method of a semiconductor device using the wiring board are proposed. A pattern of a conductive material is formed over a first substrate, a conductive film is formed over the pattern by an electrolytic plating process, the pattern and the conductive film are separated, an IC chip including at least one thin film transistor is formed over a second substrate, and the conductive film is electrically connected to the IC chip.
申请公布号 US9155204(B2) 申请公布日期 2015.10.06
申请号 US201012690992 申请日期 2010.01.21
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Maruyama Junya;Aoki Tomoyuki
分类号 H05K3/30;H05K3/20;H05K3/24 主分类号 H05K3/30
代理机构 Robinson Intellectual Property Law Office, P.C. 代理人 Robinson Eric J.;Robinson Intellectual Property Law Office, P.C.
主权项 1. A method for manufacturing a wiring board comprising the steps of: forming a first conductive film over a pattern having conductivity by an electrolytic plating process, wherein the pattern is provided over a first substrate; transposing the first conductive film to a second substrate by separating the first conductive film from the pattern; and after the transposing step, forming a second conductive film over the pattern by the electrolytic plating process, wherein the pattern is reused in forming the second conductive film by the electrolytic plating process.
地址 Atsugi-shi, Kanagawa-ken JP