发明名称 Advanced processor with fast messaging network technology
摘要 An advanced processor comprises a plurality of multithreaded processor cores each having a data cache and instruction cache. A data switch interconnect is coupled to each of the processor cores and configured to pass information among the processor cores. A messaging network is coupled to each of the processor cores and a plurality of communication ports. In one aspect of an embodiment of the invention, the data switch interconnect is coupled to each of the processor cores by its respective data cache, and the messaging network is coupled to each of the processor cores by its respective message station. Advantages of the invention include the ability to provide high bandwidth communications between computer systems and memory in an efficient and cost-effective manner.
申请公布号 US9154443(B2) 申请公布日期 2015.10.06
申请号 US200912582622 申请日期 2009.10.20
申请人 Broadcom Corporation 发明人 Hass David T;Rashid Abbas
分类号 G06F12/00;G06F13/00;G06F13/28;H04L12/931;G06F12/08 主分类号 G06F12/00
代理机构 Sterne, Kessler, Goldstein & Fox, PLLC 代理人 Sterne, Kessler, Goldstein & Fox, PLLC
主权项 1. A processor, comprising: a plurality of processor cores; a data switch interconnect ring; a messaging network ring; an interface switch interconnect ring coupled to said messaging network ring; and a plurality of communication ports coupled to said messaging network ring via said interface switch interconnect ring, said messaging network ring being configured to transfer information between at least two of said plurality of processor cores and any of the plurality of communication ports, wherein said data switch interconnect ring is directly coupled to each of said plurality of processor cores, wherein said messaging network ring is directly coupled to each of said plurality of processor cores, and wherein the data switch interconnect ring, the messaging network ring, and the interface switch interconnect ring are separate and distinct from each other.
地址 Irvine CA US