发明名称 High density vertical structure nitride flash memory
摘要 A charge trap type of memory having a memory channel with vertical and possibly horizontal components is described. The invention includes a new operation method of simultaneous hole and electron injection operation for high speed and high reliability non-volatile memories, as well as high-density non-volatile memories. Array implementations for high-density memory arrays and high-speed memory arrays and their fabrication methods are also described.
申请公布号 US9153592(B2) 申请公布日期 2015.10.06
申请号 US201414245118 申请日期 2014.04.04
申请人 Halo LSI, Inc. 发明人 Ogura Seiki;Iwasaki Tomoko;Ogura Nori
分类号 H01L27/108;H01L21/28;H01L27/115;H01L29/66;H01L29/78;H01L29/792;G11C16/10 主分类号 H01L27/108
代理机构 Saile Ackerman LLC 代理人 Saile Ackerman LLC ;Ackerman Stephen B.;Pike Rosemary L. S.
主权项 1. A memory device comprising: two vertical memory gates formed in a first direction; a silicon substrate sandwiched between said two vertical memory gates wherein a face of said silicon substrate between said silicon substrate and said memory gate forms a memory gate channel region; source regions underlying said two vertical memory gates; drain regions in a top portion of said silicon substrate; a trench isolation formed between said drain regions in a second direction which provides isolation from an adjacent memory device in said second direction wherein a depth of said trench isolation is less than a depth of said vertical memory gates; and memory gate channel oxide formed between each said source region and said drain region and between each said memory gate and said silicon substrate wherein said memory gate channel oxide comprises a first vertical non-trapping region adjacent to top vertical portion of said memory gate and a second vertical and horizontal trapping region adjacent to a bottom vertical portion of said memory gate and wherein holes and/or electrons may be stored in said second vertical trapping region.
地址 Hillsboro OR US