Adjacent wordline disturb reduction using boron/indium implant

摘要

Semiconductor devices having reduced parasitic current and methods of malting the semiconductor devices are provided. Further provided are memory devices having reduced adjacent wordline disturb. The memory devices contain wordlines formed over a semiconductor substrate, wherein at least one wordline space is formed between the wordlines. Adjacent wordline disturb is reduced by implanting one or more of indium, boron, and a combination of boron and indium in the surface of the at least one wordline space.

主权项

1. A semiconductor device comprising:
a semiconductor substrate; two or more parallel bitlines formed within the semiconductor substrate; a charge storage layer capable of storing a negative charge formed over the semiconductor substrate and the two or more parallel bitlines; two or more parallel wordlines formed over the charge storage layer, the semiconductor substrate and the two or more parallel bitlines, the two or more parallel wordlines being perpendicular to the two or more parallel bitlines; one or more wordline spaces comprising the area between the two or more parallel wordlines; and an implant comprising at least one of boron, indium, and a combination thereof embedded into the floor of at least one space of the one or more wordline spaces, wherein the implant forms an implant region which is adjacent the two or more parallel wordlines and located over the charge storage layer and the semiconductor substrate.