发明名称 |
Method of fabricating high voltage device |
摘要 |
A method of fabricating a high voltage device includes the step of forming a patterned photoresist layer on a conductive layer and a dielectric below the conductive. The conductive layer and the dielectric layer are patterned by taking the patterned photoresist layer as a mask. Subsequently the patterned photoresist layer is shrunk. The conductive layer and the dielectric layer are then patterned by taking the shrunk photoresist layer as a mask. |
申请公布号 |
US9153454(B2) |
申请公布日期 |
2015.10.06 |
申请号 |
US201313918993 |
申请日期 |
2013.06.17 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
Chen Yi-Hao;Lee Wen-Yu;Liu Hsiao-Wen;Chen Jung-Ching |
分类号 |
H01L21/308;H01L29/66;H01L29/78 |
主分类号 |
H01L21/308 |
代理机构 |
|
代理人 |
Hsu Winston;Margo Scott |
主权项 |
1. A method of fabricating a high voltage device, comprising:
providing a substrate having a dielectric layer, a conductive layer and a photoresist layer disposed on the substrate from bottom to top; patterning the photoresist layer to form a patterned photoresist layer having a first width; performing a first patterning step to pattern the conductive layer and the dielectric layer by taking the patterned photoresist layer as a first mask; forming two lightly doped source/drain regions in the substrate at two sides of the conductive layer by implanting dopants into the substrate, and wherein dopants penetrate the dielectric layer before entering the substrate; after forming the lightly doped source/drain regions, shrinking the first width of the patterned photoresist layer to a second width; performing a second patterning step to pattern the conductive layer and the dielectric layer by taking the shrunk photoresist layer as a second mask so as to form the dielectric layer into a step profile; and removing the shrunk photoresist layer. |
地址 |
Science-Based Industrial Park, Hsin-Chu TW |