Methods and apparatuses for adapting buffer capacity at routers

摘要

In a method for dynamic buffer adjustment at a line card of router, a current buffer occupancy at the line card is compared with at least a first buffer occupancy threshold, the first buffer occupancy threshold being calculated based on a buffer occupancy threshold parameter and a capacity of at least a first buffer memory at the line card; and an active buffer capacity is adjusted by at least one of activating and deactivating buffer memory blocks at the line card based on the comparing step, the activating including switching on the buffer memory blocks, and the deactivating including causing the buffer memory blocks to enter a sleep state.

主权项

1. A method for dynamic buffer adjustment at a line card of a router, the method comprising:
comparing a current buffer occupancy at the line card with at least a first buffer occupancy threshold, the first buffer occupancy threshold being calculated based on a buffer occupancy threshold parameter and a capacity of at least a first buffer memory at the line card; and adjusting an active buffer capacity by at least one of activating and deactivating buffer memory blocks at the line card based on the comparing step, the activating including switching on the buffer memory blocks, and the deactivating including causing the buffer memory blocks to enter a sleep state, the active buffer capacity being a size of active buffer memory at the line card, the active buffer memory at the line card including the first buffer memory and the activated buffer memory blocks at the line card, the size of the active buffer memory at the line card being an amount of data capable of being stored in the active buffer memory at the line card, and the current buffer occupancy being an amount of data currently being stored in the active buffer memory at the line card; wherein the first buffer memory is a first cache memory at a network processor at the line card, and the buffer memory blocks include at least one of a second cache memory block and first bulk memory block at the line card.