发明名称 Code coverage circuitry
摘要 A method with a circuit that includes a memory (130) coupled to an analog line coverage circuit (104). The analog line coverage circuit includes a plurality of buffers (151-154) in which each buffer is coupled to one memory location of the memory, a plurality of bin cells (161-164) in which each bin cell is coupled to a buffer, a multiplexer (170), each input terminal of which is coupled to a bin cell, and an analog-to-digital converter (180) coupled to the multiplexer and to an output terminal of the analog line coverage circuit. The analog line coverage circuit stores an analog voltage that is representative of a number of occasions that a memory location is accessed, and outputs a signal indicative thereof. A processor (102), coupled to the memory and to the analog line coverage circuit, enables the analog line coverage circuit when the processor is in a debug mode.
申请公布号 US9153346(B2) 申请公布日期 2015.10.06
申请号 US201414326622 申请日期 2014.07.09
申请人 Freescale Semiconductor, Inc. 发明人 Vilela Rafael M.;Tercariol Walter Luis;Neto Fernando Zampronho;Haddad Sandro A. P.
分类号 G11C11/24;G11C29/12;G11C8/08;G06F11/36;G11C7/16 主分类号 G11C11/24
代理机构 代理人
主权项 1. A method with a line coverage circuit, comprising: accessing a memory location; storing charge in a capacitor in response to accessing the memory location; realizing a voltage related to charge stored in the capacitor, wherein a value of the voltage is indicative of a number of occasions that the memory location is accessed; and outputting the voltage.
地址 Austin TX US