Methods and apparatuses for dynamic memory termination

摘要

Described herein are a method and an apparatus for dynamically switching between one or more finite termination impedance value settings to a memory input-output (I/O) interface of a memory in response to a termination signal level. The method comprises: setting a first termination impedance value setting for a termination unit of an input-output (I/O) interface of a memory; assigning the first termination impedance value setting to the termination unit when the memory is not being accessed; and switching from the first termination impedance value setting to a second termination impedance value setting in response to a termination signal level.

主权项

1. A system comprising:
a synchronous dynamic random access memory (SDRAM) device, the SDRAM device comprising at least
a memory array,a mode register to hold at least one mode register bit, wherein the value of the at least one mode register bit is to determine an on-die termination (ODT) mode based on whether the SDRAM device is selected for memory access or non-selected for memory access, andODT circuitry coupled with the mode register to provide a programmable termination value based on the ODT mode in accordance with a state table separate from the mode register, wherein the programmable termination value corresponds to RTT PARK to identify a finite termination value for the SDRAM device when it is non-selected for memory access, and ODT is not enabled for the SDRAM device; and a memory controller coupled with the SDRAM device, the memory controller comprising at least command and control logic to control the ODT mode of the SDRAM and to control selection of the SDRAM device for memory access.