发明名称 |
METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
<p>PROBLEM TO BE SOLVED: To solve a problem that an occupied area for circuit patterns increases beyond expectation in association with increase of a memory region in such layout that end part dummy patterns occupying an appreciable area are arranged in the surrounding part of a memory region in a chip mixedly mounted with a logic region and a memory region in order to reduce the phenomenon of fluctuation due to a process since a comparatively irregular logic region and a memory region mostly having comparatively regular parts mixedly exist in many case in a present LSI.SOLUTION: A local density correction amount on the basis of a local pattern data density is added to a memory cell-containing region including a memory cell region in designing data to generate pre-bias data. The contracted projection exposure by ultraviolet exposure light is executed thereto using an optical mask made by generating mask data by a model base OPC operation.</p> |
申请公布号 |
JP2015176103(A) |
申请公布日期 |
2015.10.05 |
申请号 |
JP20140054526 |
申请日期 |
2014.03.18 |
申请人 |
RENESAS ELECTRONICS CORP |
发明人 |
TAKEDA MIYUKI |
分类号 |
G03F1/36;H01L21/027;H01L21/8244;H01L27/11 |
主分类号 |
G03F1/36 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|