发明名称 SINGLE EXPOSURE IN MULTI-DAMASCENE PROCESS
摘要 Methods of fabricating a multi-layer semiconductor device such as a multi-layer damascene or inverted multi-layer damascene structure using only a single or reduced number of exposure steps. The method may include etching a precursor structure formed of materials with differential removal rates for a given removal condition. The method may include removing material from a multi-layer structure under different removal conditions. Further disclosed are multi-layer damascene structures having multiple cavities of different sizes. The cavities may have smooth inner wall surfaces. The layers of the structure may be in direct contact. The cavities may be filled with a conducting metal or an insulator. Multi-layer semiconductor devices using the methods and structures are further disclosed.
申请公布号 US2015279730(A1) 申请公布日期 2015.10.01
申请号 US201514731251 申请日期 2015.06.04
申请人 Tessera, Inc. 发明人 UZOH Cyprian;OGANESIAN Vage;MOHAMMED Ilyas;MITCHELL Craig;HABA Belgacem
分类号 H01L21/768;H01L23/522 主分类号 H01L21/768
代理机构 代理人
主权项
地址 San Jose CA US