发明名称 RUNTIME CHARGEBACK IN A SIMULTANEOUS MULTITHREADING (SMT) ENVIRONMENT
摘要 A technique for chargeback with simultaneous multithreading (SMT) by a computer is provided. One or more of an operating system and a second-level hypervisor of the computer manage a logical core configuration for simultaneous multithreading, the operating system and/or the second-level hypervisor has control over a logical core and control over logical threads on the logical core. The operating system and/or the second-level hypervisor is configures a host hypervisor to assign an entirety of the logical core to a single physical core, such that one logical core executes per physical core. The logical core is run on the single physical core on an exclusive basis for a period of time, such that the logical threads of the logical core execute on physical threads of the single physical core. A capacity use time is determined for each of the logical threads executing on the physical threads of the single physical core.
申请公布号 US2015277984(A1) 申请公布日期 2015.10.01
申请号 US201414231794 申请日期 2014.04.01
申请人 International Business Machines Corporation 发明人 Abraham Ansu A.;King Gary M.;Rosa Daniel V.;Schmidt Donald W.
分类号 G06F9/50;G06F9/30;G06F9/455 主分类号 G06F9/50
代理机构 代理人
主权项 1. A method for chargeback with simultaneous multithreading (SMT) by a computer, the method comprising: managing, by one or more of an operating system and a second-level hypervisor of the computer, a logical core configuration for simultaneous multithreading, the one or more of the operating system and the second-level hypervisor having control over a logical core and control over logical threads on the logical core; configuring, by the one or more of the operating system and the second-level hypervisor of the computer, a host hypervisor to assign an entirety of the logical core to a single physical core, such that one logical core executes per physical core; running the logical core on the single physical core on an exclusive basis for a period of time, such that the logical threads of the logical core execute on physical threads of the single physical core; and determining a capacity use time for each of the logical threads executing on the physical threads of the single physical core.
地址 Armonk NY US