摘要 |
Techniques related to III-N transistors having enhanced breakdown voltage, systems incorporating such transistors, and methods for forming them are discussed. Such transistors include a hardmask having an opening over a substrate, a source, a drain, and a channel between the source and drain, and a portion of the source or the drain disposed over the opening of the hardmask. |
申请人 |
INTEL CORPORATION;THEN, HAN WUI;CHU-KUNG, BENJAMIN;DASGUPTA, SANSAPTAK;CHAU, ROBERT;SUNG, SEUNG HOON;PILLARISETTY, RAVI;RADOSAVLJEVIC, MARKO |
发明人 |
THEN, HAN WUI;CHU-KUNG, BENJAMIN;DASGUPTA, SANSAPTAK;CHAU, ROBERT;SUNG, SEUNG HOON;PILLARISETTY, RAVI;RADOSAVLJEVIC, MARKO |