发明名称 DICING PROCESSES FOR THIN WAFERS WITH BUMPS ON WAFER BACKSIDE
摘要 Approaches for front side laser scribe plus backside bump formation and laser scribe and plasma etch dicing process are described. For example, a method of dicing a semiconductor wafer having integrated circuits on a front side thereof involves forming first scribe lines on the front side, between the integrated circuits, with a first laser scribing process. The method also involves forming arrays of metal bumps on a backside of the semiconductor wafer, each array corresponding to one of the integrated circuits. The method also involves forming second scribe lines on the backside, between the arrays of metal bumps, with a second laser scribing process, wherein the second scribe lines are aligned with the first scribe lines. The method also involves plasma etching the semiconductor wafer through the second scribe lines to singulate the integrated circuits.
申请公布号 US2015279739(A1) 申请公布日期 2015.10.01
申请号 US201414226038 申请日期 2014.03.26
申请人 Lei Wei-Sheng;Papanu James S.;Iyer Aparna;Eaton Brad;Kumar Ajay 发明人 Lei Wei-Sheng;Papanu James S.;Iyer Aparna;Eaton Brad;Kumar Ajay
分类号 H01L21/78;H01L23/544 主分类号 H01L21/78
代理机构 代理人
主权项 1. A method of dicing a semiconductor wafer comprising integrated circuits on a front side thereof, the method comprising: forming first scribe lines on the front side, between the integrated circuits, with a first laser scribing process; forming arrays of metal bumps on a backside of the semiconductor wafer, each array corresponding to one of the integrated circuits; forming a mask layer on the backside, covering the arrays of metal bumps; forming second scribe lines on the backside, between the arrays of metal bumps, with a second laser scribing process, wherein the second scribe lines are aligned with the first scribe lines, and wherein the mask layer is patterned by the second laser scribing process; plasma etching the semiconductor wafer through the second scribe lines to singulate the integrated circuits; and removing the mask layer subsequent to the plasma etching.
地址 San Jose CA US
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