SYSTEM AND METHOD FOR ADDING ERROR PROTECTION CAPABILITY TO A DIGITAL LOGIC CIRCUIT

摘要

A system and method for adding error protection capability to a digital logic circuit, for example including random storage logic. Various aspects of the present disclosure, for example, comprise providing error protection against soft errors that occur during operation of digital logic circuitry.

主权项

1. A method of producing an electronic device with on-board error detection, the method comprising:
generating a plurality of parity protect groups, where each of the plurality of parity protect groups comprises:
a number of storage elements under test, each of which is coupled to a same set of control signal inputs comprising: a same clock net, a same clear net, and a same preset net;a parity test storage element coupled to said same set of control signal inputs; anda parity test output; generating a report point comprising a report point storage element that outputs parity test results; logically combining each of the respective parity test outputs of each of the plurality of parity protect groups at an input of the report point storage element; and fabricating the electronic device comprising said plurality of parity protect groups and said report point, wherein:
the plurality of parity protect groups are all associated with said same set of control signal inputs; andthe respective number of storage elements under test of each of the plurality of parity protect groups is an odd number.