发明名称 DESIGN METHOD AND DESIGN APPARATUS
摘要 When a design apparatus adjusts clock skews, the design apparatus separates each of the power supply currents which flow through circuit sections that operate in synchronization with a clock signal into a plurality of frequency components, sets skew values of the clock signal which reaches the circuit sections, and performs, by changing the skew values, repetition of calculating a combined amplitude by combining, with respect to each of the frequency components, corresponding ones of the frequency components of the power supply currents which flow through the circuit sections and finds dependence of the combined amplitude on a skew.
申请公布号 US2015278415(A1) 申请公布日期 2015.10.01
申请号 US201514629910 申请日期 2015.02.24
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 YAMAMOTO Furuna
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A design method for adjusting clock skews, the method comprising: separating, by a computer, each of power supply currents which flow through a plurality of circuit sections that operate in synchronization with a clock signal into a plurality of frequency components; setting skew values of the clock signal which reaches the plurality of circuit sections; and performing, by the computer, by changing the skew values, repetition of calculating a combined amplitude by combining, with respect to each of the frequency components, corresponding ones of the frequency components of the power supply currents which flow through the plurality of circuit sections and finding dependence of the combined amplitude on a skew.
地址 Yokohama-shi JP