| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a field-effect transistor capable of easily reducing a chip while keeping a high gain.SOLUTION: A field-effect transistor comprises a semiconductor laminate, a plurality of multi-finger electrodes 10, a ground electrode, a gate terminal electrode 50, a drain terminal electrode 60, and a plurality of source terminal electrodes 70. The semiconductor laminate is provided with a via hole reaching from a first surface to a second surface. The plurality of source terminal electrodes 70 are connected to the ground electrode by a conductive part provided in the via hole, and also connected to finger source electrodes 40. Two source terminal electrodes 70 connected to the finger source electrodes 40 in two cell regions are alternately arranged on the first side and the second side. Straight lines LC1 and LC2 connecting the center of the via hole intersect a straight line 95 but are not orthogonal to the straight line 95.</p> |
