| 发明名称 |
RAMPING INHIBIT VOLTAGE DURING MEMORY PROGRAMMING |
| 摘要 |
The inhibit voltage is a voltage applied to wordlines adjacent to a program wordline having a memory cell to write during the program operation. The inhibit voltage for a program operation can be ramped up during the program pulse. Instead of applying a constant high inhibit voltage that results in the initial boosted channel potential reducing drastically due to leakage, a system can start the inhibit voltage lower and ramp the inhibit voltage up during the program pulse. The ramping up can be a continuous ramp or in finite discrete steps during the program pulse. Such ramping of inhibit voltage can provide better tradeoff between program disturb and inhibit disturb. |
| 申请公布号 |
US2015279476(A1) |
申请公布日期 |
2015.10.01 |
| 申请号 |
US201414228245 |
申请日期 |
2014.03.27 |
| 申请人 |
Rajwade Shantanu R.;Kalavade Pranav;Mielke Neal R.;Parat Krishna K.;Raghunathan Shyam Sunder |
发明人 |
Rajwade Shantanu R.;Kalavade Pranav;Mielke Neal R.;Parat Krishna K.;Raghunathan Shyam Sunder |
| 分类号 |
G11C16/34;G11C16/10 |
主分类号 |
G11C16/34 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method comprising:
initiating a program operation for a memory cell in a program wordline of a memory device, the program operation having an associated program operation window during which the program operation executes; generating an initial inhibit voltage for one or more wordlines adjacent to the program wordline for a start of the program operation; and ramping up the inhibit voltage during the program operation window. |
| 地址 |
US |
