PROGRAMMABLE SCALABLE VOLTAGE TRANSLATOR

摘要

Methods and apparatus relating to a programmable scalable voltage translator are described. In one embodiment, logic translates an input voltage level into a plurality of output voltage levels during a low power consumption state of a device. Other embodiments are also disclosed and claimed.

主权项

1. An apparatus comprising:
logic, at least a portion of which is in hardware, to translate an input voltage level into a plurality of output voltage levels during a low power consumption state of a device, wherein the logic is to comprise one or more registers to store one or more parameters, wherein, during the low power consumption state, data stored in the one or more registers are to be retained.