LOCAL POWER GATE (LPG) INTERFACES FOR POWER-AWARE OPERATIONS

摘要

Technologies for local power gate (LPG) interfaces for power-aware operations are described. A processor includes locally-gated circuitry of a core, main core circuitry of the core, the main core, and local power gate (LPG) hardware. The LPG hardware is to power gate the locally-gated circuitry according to local power states of the LPG hardware. The main core decodes a first instruction of a set of instructions to perform a first power-aware operation of a specified length, including computing an execution code path for execution. The main core monitors a current local power state of the LPG hardware, selects one of the code paths based on the current local power state, the specified length, and a specified threshold, and issues a hint to the LPG hardware to power up the locally-gated circuitry and continues execution of the first power-aware operation without waiting for the locally-gated circuitry to be powered up.

主权项

1. A processor comprising:
locally-gated circuitry of a core; main core circuitry of the core, the main core comprising a decode unit and an execution unit; and local power gate (LPG) hardware coupled to the locally-gated circuitry and the main core circuitry, the LPG hardware to power gate the locally-gated circuitry according to local power states of the LPG hardware, wherein the decode unit is to decode a first instruction of a set of instructions to perform a first power-aware operation of a specified length, the first instruction to compute an execution code path for execution, and wherein the execution unit is to:
execute a first micro-operation to monitor a current local power state of the LPG hardware;execute a second micro-operation to select one of a plurality of code paths based on the current local power state, the specified length, and a specified threshold; andexecute a third micro-operation in the selected one of the plurality of code paths to issue a hint to the LPG hardware to power up the locally-gated circuitry and to continue execution of the first power-aware operation without waiting for the locally-gated circuitry to be powered up.