| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To solve the problem that a circuit scale increases since it is inevitable to use many delay elements for timing adjustment of operation processing, in an LSI using the conventional dynamic configurable technique. <P>SOLUTION: As for a delay circuit 1, in a data delay part 1a, input data are delayed by two or more data delay elements. In a valid delay part 1b, the input valid indicating the validity of the input data is delayed by a valid delay element corresponding to a data delay element of the data delay part 1a. Thereby, the input data and their valid pass the data delay element and the valid delay element at the same timing. Since an output signal of each data delay element and a valid delay element can be taken out, respectively, with respect to one incoming signal inputted into the delay circuit 1, two or more output signals of a desired amount of delay can be acquired. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
