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发明名称
Vorrichtung und Verfahren zur High-Level-Synthese, Verfahren zur Produktion von logischen Schaltungen unter Verwendung des Verfahrens zur High-Level-Synthese,und Aufzeichnungsmedium
摘要
申请公布号
DE60221462(T2)
申请公布日期
2008.04.17
申请号
DE20026021462T
申请日期
2002.06.06
申请人
SHARP K.K.
发明人
OHNISHI, MITSUHISA
分类号
G06F17/50;H03K19/00
主分类号
G06F17/50
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代理人
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