POWER SEMICONDUCTOR DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a power semiconductor device meeting the needs of increasing current and improving reliability even if an interval between gate wires is enlarged. SOLUTION: The power semiconductor device includes an n+-buffer layer 56 provided on an upper surface of a p+-collector layer 55, an n--layer 57 provided on the n+-buffer layer 56, a p-base region 58 selectively provided within a surface of the n--layer 57, an n+-emitter region 59 selectively provided within a surface of the p-base region 58, a gate insulation film 60 provided on part of the n--layer 57, the p-base region 58 and the n+-emitter region 59, a polysilicon film 1a provided on the gate insulation film 60, a gate electrode 1 provided on the polysilicon film 1a and made of a doped polysilicon film including impurities doped, an emitter electrode provided on the p-base region 58 and electrically connected with the n+-emitter region 59, and a collector electrode provided on a lower surface of the p+-collector layer. COPYRIGHT: (C)2008,JPO&INPIT