发明名称 METHOD FOR MANUFACTURING FAIL ANALYSIS SAMPLE FOR SEMICONDUCTOR DEVICE
摘要 A method for manufacturing a sample for analyzing a fail of a semiconductor device is provided to selectively etch and remove materials with different steps of wet etching according to etching selectivity of each material, and selectively remove a storage node using a solution having its own etching selectivity, while maintaining a cause of failure. A method for manufacturing a sample for analyzing a fail of a semiconductor device which is processed by passivation treatment, the method comprises the steps of: etching an interlayer dielectric and passivation films, and removing a metal wire line of the semiconductor device using a first wet etching for decapsulation; removing a polysilicon layer of a storage node of the semiconductor device using a second wet etching; and removing a Ti layer of the storage node using a third wet etching.
申请公布号 KR20080024642(A) 申请公布日期 2008.03.19
申请号 KR20060089017 申请日期 2006.09.14
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, JUN DONG;LEE, NAM IL;CHOI, YOUNG HYUN
分类号 H01L21/66;H01L21/304;H01L21/3063 主分类号 H01L21/66
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