| 摘要 |
PROBLEM TO BE SOLVED: To provide a latency counter which is automatically recoverable without rebooting even if the counter becomes temporarily unfixed. SOLUTION: The latency counter includes: a point shift type FIFO circuit 160 in which a plurality of latch circuits 160-1 to 160-7 with the respective input gates 160in to 167in and output gates 160out to 167out are connected in parallel, and an internal command MDRDT is supplied to the input gates in common; and a selector 200 for bringing one of the input gates and one of the output gates into conduction. The selector 200 includes a counter 120 for switching selective operation of the input gates and the output gates. The counter 120 outputs a count value in a binary format in synchronization with an internal clock ICLK. Thus, since the binary format counter is used, the count value does not serve as an error itself any longer. COPYRIGHT: (C)2008,JPO&INPIT |
