发明名称 Exposure method for upper layer of hole of semiconductor device
摘要 An exposure method executed after processing a hole in a substrate of a semiconductor device, has an exposure step of transferring a pattern on a mask onto an upper layer of the hole and forming a wiring groove by exposure, wherein a quantity of exposure with which a wiring groove 11 just above the hole or the wiring groove in the vicinity of the hole is exposed to light, is greater than a quantity of exposure with which a wiring groove 11 A in a position spaced away from just above the hole is exposed to the light.
申请公布号 US2008032437(A1) 申请公布日期 2008.02.07
申请号 US20060595917 申请日期 2006.11.13
申请人 FUJITSU LIMITED 发明人 SUGIMOTO FUMITOSHI;OZAWA KIYOSHI
分类号 H01L21/00;G03F1/36;G03F1/68;G03F7/20;H01L21/027;H01L21/3205;H01L21/768 主分类号 H01L21/00
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