发明名称 Semiconductor apparatus design method and execution program therefor
摘要 A design method places a dummy line in floating state in a line layer of a semiconductor apparatus by using a computer. The method includes a first step of reading layout data and placing a dummy line with a longitudinal side lying in parallel with a signal line in an area where a pattern density of the signal line in a prescribed area is equal to or lower than a density lower limit, and a second step of dividing a dummy line placed in an area where a distance from the signal line is equal to or shorter than a dummy dividing distance.
申请公布号 US2007288879(A1) 申请公布日期 2007.12.13
申请号 US20070790794 申请日期 2007.04.27
申请人 NEC ELECTRONICS CORPORATION 发明人 KOBAYASHI NAOHIRO
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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