发明名称 GAME MACHINE
摘要 <p><P>PROBLEM TO BE SOLVED: To facilitate the address management of image data and to prevent the increase of control burdens. <P>SOLUTION: For image element data set so as to increase a display frequency, a transfer control circuit 152 reads the image element data from a CGROM 142 and transfers them to a fixed address area 155A beforehand in response to the reception of a prior transfer command. A plotting circuit 154 writes the image element data read from the read address of the fixed address area 155A to a write address in a frame buffer memory 156 to be stored in response to the reception of a fixed address specification display command. The other image element data are read from the CGROM 142 and transferred to an automatic transfer area 155B by the transfer control circuit 152 responding to the reception of an automatic transfer display command. The plotting circuit 154 writes the image element data read from the automatic transfer area 155B to the write address in the frame buffer memory 156 to be stored. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2007236403(A) 申请公布日期 2007.09.20
申请号 JP20060034527 申请日期 2006.02.10
申请人 SANKYO KK 发明人 TANI MASAHITO;KIMURA WATARU;TANIGUCHI KAZUO
分类号 A63F7/02;G06T1/20 主分类号 A63F7/02
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