DOUBLING OF SPEED IN CMOS SENSOR WITH COLUMN-PARALLEL ADCs

摘要

PROBLEM TO BE SOLVED: To provide an imaging system having high-speed top and bottom digitization circuits for performing a sample-and-hold operation and analog-to-digital conversion in two steps.

SOLUTION: While one digitization circuit is performing a sample-and-hold operation, the other digitization circuit is performing analog-to-digital conversion. The speed of the imaging system may be further increased by interleaving operations within the top and bottom digitization circuits by using additional sets of sample-and-hold circuits and analog-to-digital converters.

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