发明名称 MULTI-CYCLE PATH VERIFICATION METHOD
摘要 PROBLEM TO BE SOLVED: To provide a multi-cycle path verification method capable of obtaining a verification result at an early stage. SOLUTION: The multi-cycle path verification method is provided, which has a delay data generation step for generating delay data on the basis of the number of multi-cycles of a circuit having a multi-cycle path (116), and a first simulation step for performing timing verification by giving the generated delay data to the data of the multi-cycle path and performing simulation (110). COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007241836(A) 申请公布日期 2007.09.20
申请号 JP20060065736 申请日期 2006.03.10
申请人 FUJITSU LTD 发明人 YODA HITOSHI
分类号 G06F17/50 主分类号 G06F17/50
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