发明名称 ELECTRIC CIRCUIT FOR AND METHOD OF GENERATING A CLOCK SIGNAL
摘要 An electric circuit (30) for generating a clock-sampling signal (CLK) for a sampling device (31) comprises a clock generator (1, 40, 50, 60) for generating a plurality of clock signals (21 - 24, 51 - 54, 61 - 64), a correlation device (L) for correlating a characteristic signal section (LE) of a digital signal (DS) with the plurality of clock signals (21, 22, 23, 24, 51 - 56, 61 - 64), and a selecting device (MX) for selecting one of the clock signals (21, 22, 23, 24, 51 - 55, 61 - 64) as the clock-sampling signal (CLK) for the sampling device (31) on the basis of the correlation by the correlation device (L). The clock signals (21 - 24, 51 - 54, 61 - 64) have the same cycle duration (T) and are phase-shifted with respect to each other. The sampling device (31) subsequently samples the digital signal (DS) with the clock-sampling signal (CLK).
申请公布号 WO2007069138(A3) 申请公布日期 2007.09.20
申请号 WO2006IB54626 申请日期 2006.12.06
申请人 NXP B.V.;SPINDLER, ROBERT;BRANDL, ROLAND;BERGLER, EWALD 发明人 SPINDLER, ROBERT;BRANDL, ROLAND;BERGLER, EWALD
分类号 H03K5/13;H03L7/081;H04L7/033 主分类号 H03K5/13
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