| 摘要 |
Non volatile memory cells are integrated on a semiconductor substrate, each cell comprising a floating gate electrode. These cells are made by depositing at least one protective layer on the semiconductor substrate, forming a first plurality of openings in the protective layer, etching the semiconductor substrate through the first plurality of openings so as to form a plurality of trenches, filling in the plurality of trenches and the first plurality of openings with an insulation layer, etching surface portions of the protective layer to form: surface portions of the insulation layer projecting from the semiconductor substrate divided from each other by a second plurality of openings, and lower portions of the protection layer confined below the second plurality of openings, etching the insulation layer to reduce the cross dimensions of the surface portions of the insulation layer, removing the lower portions of said protection layer until the semiconductor substrate is exposed.
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