| 摘要 |
A circuit for providing an output voltage for a DRAM word line which can be used to drive memory word lines which can be as high as 2V<SUB>dd</SUB>. Transistors in a boosting circuit are fully switched, eliminating reduction of the boosting voltage by V<SUB>tn </SUB>through the transistors. The boosting capacitors are charge by V<SUB>dd</SUB>. A regulator detects conduction current of a replica of a memory cell access transistor, shutting off the boosting circuit clock oscillator when the correct voltage to operate the access transistor has been reached.
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