发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To improve the data transfer rate of a semiconductor memory. SOLUTION: A refresh control circuit generates a refresh request in a predetermined cycle. A first burst control circuit outputs a predetermined number of strobe signals in accordance with an access command. A burst access operation is executed by an access command. A data input/output circuit successively inputs data to be transferred to a memory cell array or successively outputs data supplied from the memory cell array, in synchronization with the strobe signals. An arbitration circuit determines which of a refresh operation or a burst access operation is to be executed first, when the refresh request and the access command conflict with each other. Therefore, the refresh operation and the burst access operation can be sequentially executed without being overlapped. As a result, read data can be output at a high speed, and write data can be input at a high speed. That is, the data transfer rate can be improved. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007103009(A) 申请公布日期 2007.04.19
申请号 JP20070011197 申请日期 2007.01.22
申请人 FUJITSU LTD 发明人 FUJIOKA SHINYA;OKUYAMA YOSHIAKI
分类号 G11C11/406;G11C11/403;G11C11/407 主分类号 G11C11/406
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