发明名称 MEMORY SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To flexibly cope with access to a memory on the assumption of different erasure block size. <P>SOLUTION: A memory card 1 has a controller 4 and a NAND type flash memory 3. The controller 4 includes a ROM 9 which stores a program for managing association between a first address in a semiconductor memory having the first erasure block size and a second address in a semiconductor memory having second erasure block size larger than the first erasure block size and a CPU 8 which executes the program stored in the ROM 9. The NAND type flash memory 3 has the second erasure block size. The controller 4 executes access to the NAND type flash memory 3 using the second address. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007102805(A) 申请公布日期 2007.04.19
申请号 JP20060313375 申请日期 2006.11.20
申请人 TOSHIBA CORP 发明人 SUKEGAWA HIROSHI
分类号 G06F12/02;G06F3/08;G06F12/00;G06F12/06;G06K19/07 主分类号 G06F12/02
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