发明名称 |
Finfet with dual silicon gate layer for chemical mechanical polishing planarization |
摘要 |
A FinFET-type semiconductor device includes a fin structure on which a relatively thin amorphous silicon layer and then an undoped polysilicon layer is formed. The semiconductor device may be planarized using a chemical mechanical polishing (CMP) in which the amorphous silicon layer acts as a stop layer to prevent damage to the fin structure. |
申请公布号 |
GB2418534(B) |
申请公布日期 |
2007.01.31 |
申请号 |
GB20050024314 |
申请日期 |
2004.06.05 |
申请人 |
ADVANCED MICRO DEVICES, INC |
发明人 |
KRISHNASHREE ACHUTHAN;SHIBLY S AHMED;HAIHONG WANG;BIN YU |
分类号 |
H01L29/786;H01L21/321;H01L21/336;H01L29/49 |
主分类号 |
H01L29/786 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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