<p>A lithography method using a bi-layer resist is provided to increase a lithography process margin by increasing selectivity to an upper resist layer and reducing a thickness of the upper resist layer. An etching target layer(102) is formed on a substrate(100). A lower resist layer(104) is formed on the etching target layer. An upper resist layer is formed on the lower resist layer. An upper resist layer pattern(106a) is formed by exposing and developing the upper resist layer. A material layer similar to a silicon oxide(108) is formed on the upper resist layer by performing a hard bake process under oxygen atmosphere. A lower resist layer pattern is formed by developing the lower resist layer. The etching target layer is etched by using the lower resist layer pattern as a mask.</p>
申请公布号
KR20060131344(A)
申请公布日期
2006.12.20
申请号
KR20050051698
申请日期
2005.06.16
申请人
SAMSUNG ELECTRONICS CO., LTD.
发明人
KIM, DO YOUNG;LEE, HONG;YUN, HYO JIN;RYU, JIN A;CHOI, NAM UK;PARK, KYOUNG SIL;KIM, JAE HO;KIM, YOUNG HO