| 摘要 |
<P>PROBLEM TO BE SOLVED: To eliminate the need for a client to be conscious of a high-speed/low-speed clock when preparing an internal power supply for receiving external power and supplying it to an electronic circuit. <P>SOLUTION: When using a DLL circuit 2 employing a clock CLK, an external power supply 3 and the DLL circuit 2 are connected, an internal power supply circuit 1 that drops the voltage of the external power supply 3 and supplies it to the DLL circuit 2, divides an internal power supply into a fundamental power supply circuit 11 and an additional power supply circuit 12 and moreover, a frequency determination circuit 20 fetches the clock CLK, detects its frequency and controls whether the additional power supply circuit 12 is to be connected or not based on a determination signal LM1 of the detected frequency. As a result, the fundamental power supply circuit 11 and the additional power supply circuit 12 work over the range of high frequency and only the fundamental power supply circuit 11 operates within the range of low voltage, thereby reducing current consumption. Furthermore, a plurality of additional power supply circuits can be provided. <P>COPYRIGHT: (C)2007,JPO&INPIT |
