发明名称 ZUORDNUNG VON VIRTUELLEN ZU PHYSISCHEN SPEICHERADRESSEN IN EINEM SYSTEM MIT EINEM SICHEREN BEREICH UND EINEM NICHT SICHEREN BEREICH
摘要 An apparatus for processing data, the apparatus comprising: a processor operable in a plurality of modes and either a secure domain or a non-secure domain including at least one secure mode being a mode in the secure domain; and at least one non-secure mode being a mode in the non-secure domain. When the processor is executing a program in a secure mode, the program has access to secure data which is not accessible when the processor is operating in a non-secure mode. The processor further includes a non-secure translation table base address register and a secure translation table base address register operable in the non-secure and secure domain, respectively, to indicate a region of memory storing either non-secure or secure domain memory mapping data defining how virtual addresses are translated to physical addresses within either the non-secure or secure domain.
申请公布号 DE60306952(D1) 申请公布日期 2006.08.31
申请号 DE2003606952 申请日期 2003.10.27
申请人 ARM LTD., CHERRY HINTON 发明人 WATT, SIMON CHARLES;DORNAN, BENTLEY;ORION, LUC;CHAUSSADE, NICOLAS;BELNET, LIONEL;BROCHIER, ERIC;MANSELL, DAVID HENNAH;NONWEILER, ROBERT
分类号 G06F9/46;G01R31/00;G06F9/48;G06F12/00;G06F12/02;G06F12/08;G06F12/10;G06F12/14 主分类号 G06F9/46
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