发明名称 Arithmetic and logic unit
摘要 An arithmetic and logic unit ("ALU") of a microprocessor is subdivided into two blocks corresponding respectively to bits 0-15 and 16-31, the first block being of the type with simple carry propagation ("manchester carry ripple") and the second being of the type with carry selection ("carry select"), each of the blocks itself being subdivided into sub-blocks each of four bits, sub blocks each equipped with a carry skip device ("carry skip") relating to the sub block. With each four bit sub-block is associated a circuit (LOOBIT, LOOBIS) for carrying out the carry skip and regenerating the levels. <IMAGE>
申请公布号 FR2596543(A1) 申请公布日期 1987.10.02
申请号 FR19860004507 申请日期 1986.03.28
申请人 RADIOTECHNIQUE COMPELEC 发明人 MICHEL LANFRANCA, JEAN-MICHEL LABROUSSE ET CHRISTIAN DENEUCHATEL;LABROUSSE JEAN-MICHEL;DENEUCHATEL CHRISTIAN
分类号 G06F7/50;G06F7/507;(IPC1-7):G06F7/00 主分类号 G06F7/50
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