| 摘要 |
PURPOSE:To attain the quick processing by controlling a top vertex, deciding the need of calculating an intersection point and actually calculating an intersection point by their dedicated hardwares. CONSTITUTION:A buffer register group control circuit 11 decides the attribute data of register groups 6 and 9. If the attribute of the group 6 is of vertex data and that of the group 9 is of a polygon number, it is clarified that the vertext data stored in the group 6 is top vertex data, and the control circuit 11 outputs a storage permission signal to a buffer register group 7. At that time a selection permit signal to a selector 8 is given so as to make the output of the group 6 effective. Accordingly the output of the group 6 is stored in the groups 7 and 9. The 2nd and subsequent vertexes are not stored in the group 7. If the attribute of the group 6 becomes polygon data, the circuit 11 inhibits next data from being stored and makes the output of the group 7 effective. Accordingly a vertex string where top vertex data is added after final vertex data is stored. An intersection decision circuit 12 decides continuous two vertexes stored in the group 9 and a register group 10 lie on which side of an effective area, and controls the output of a selector 13. |
