发明名称 SCAN PATH CONTROL SYSTEM
摘要 PURPOSE:To improve the reliability of scan paths with a small amount of hardware by providing a plural scan paths, registers, and a scan data buffer and outputting shift out data while selecting it. CONSTITUTION:In case of scan out, contents of scan paths 11 and 12 are shifted out bit by bit in response to a shift clock to output shift out data 111 and 121 to registers 23 and 24 when an address counter 22 is initialized. When 8 bits are inputted to registers 23 and 24, this input data is written in a scan data buffer 21 through a selecting circuit 25. After the write operation to the buffer 21 and the shift-out operation to paths 11 and 12 are completed, contents of the buffer 21 are outputted to a maintenance and diagnostic device 3. Thus, a data 121 of the path 12 is correctly read out even in case of trouble in the path 11, and the reliability of scan paths is improved with a small amount of hardware.
申请公布号 JPS6314247(A) 申请公布日期 1988.01.21
申请号 JP19860158217 申请日期 1986.07.04
申请人 NEC CORP 发明人 MORIYAMA SHUKICHI
分类号 G06F11/22 主分类号 G06F11/22
代理机构 代理人
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