发明名称 TRANSFER CONTROLLER FOR DIRECT MEMORY ACCESS
摘要 PURPOSE:To realize the batch transfer of 2-dimensional area data in the form of one area data by adding a constant to the contents of an address pointer for each end of transfer of data equivalent to one line and therefore eliminating the need for a resetting task of a transfer parameter. CONSTITUTION:A transfer parameter is set just in a single time at first by a host CPU and a direct memory access DMA control part 3 is started. Then the transfer of data is started from the head address of the 2-dimensional area data and an address pointer 4 is increased one by one for designation of addresses until the transfer of data equivalent to one line is ended. Then a constant K (equivalent to the number of words set between the end of a line and the start of the next line) is added to the contents of the pointer 4 for each end of transfer of data equivalent to one line The DMA transfer is ended with the end of the transfer of data to the final line. Thus the 2-dimensional area data can be transferred by an amount equal to one area with a transfer parameter set just in a single time.
申请公布号 JPS63159961(A) 申请公布日期 1988.07.02
申请号 JP19860309414 申请日期 1986.12.24
申请人 TOSHIBA CORP 发明人 MORI JUNJI
分类号 G06F12/02;G06F13/28;G06T1/60 主分类号 G06F12/02
代理机构 代理人
主权项
地址