发明名称 GAAS MEMORY DEVICE
摘要 <p>PURPOSE:To attain high speed write by giving a low potential to the gate of a pull-up FET only at write to the bit line so as to limit a pull-up current. CONSTITUTION:A write control signal, the inverse of C is inputted to the gate of a pull-up FET (T1, T2) in a GaAs memory. The signal represents a NOR logic between a Y decoder and the AND of a write enable signal WE. In the case of the write to a column Y, the FET (T1, T2) is turned off to suppress the pull-up current and information is written accurately at high speed onto bit lines B, and the inverse of B. In the case of write to other column, the pull-up FF is turned on and the bit line amplitude is kept small, then the quick readout is attained at the next readout cycle. Similarly, a large pull-up FET is turned on at readout to supply a large pull-up current for high speed readout.</p>
申请公布号 JPS63160087(A) 申请公布日期 1988.07.02
申请号 JP19860306953 申请日期 1986.12.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HASEGAWA KATSUYA
分类号 G11C11/41;G11C11/34;G11C11/40 主分类号 G11C11/41
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