发明名称 INTERRUPTION TIMING CONTROL SYSTEM
摘要 PURPOSE:To avoid the useless occupation of buses by collecting the timing information on each host device into a memory at the time of initialization and deciding the transmission timing of an interruption signal based on the collected timing information. CONSTITUTION:At the time of initialization of a system, a timing control means 15 of a disk control device 4 reads the information on the optimum timing accordance with each performance out of the host devices 1, 2 and 3 via a common bus 13 by an SCSI (small computer system interface) protocol and devices these information for each device number to record them into a memory 14. In the same way, the means 15 of disk control devices 5 and 6 record the timing information on devices 1-3 into the memory 14. Then the means 15 set the transmission timing of interruption signals to the devices 1-3 based on said timing information. Thus it is possible to avoid the useless occupation of the common bus.
申请公布号 JPS63159960(A) 申请公布日期 1988.07.02
申请号 JP19860309489 申请日期 1986.12.24
申请人 FUJITSU LTD 发明人 TANAKA NOBUO
分类号 G06F13/24 主分类号 G06F13/24
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