| 摘要 |
PURPOSE:To prevent data transmission from being interrupted, by providing a clock cut off detection circuit which detects the stoppage of a reception clock and a clock generation circuit at a data transmitter, and starting the transmission of the clock by the transmitter having the earliest detecting time of the cut off of the clock. CONSTITUTION:The reception clock phi1 is supplied to the clock cut off detection circuit 7 via a two-way buffer 13. The reception clock phi1 is differentiated at a differentiation circuit 17 in the detection circuit 7, and a trigger (gamma) synchronized with the leading edge of the clock is generated. The (gamma) resets a value counted up to the set value of a switch group 16 by an internal clock phi1. While the reception clock phi1 is supplied normally, the CQ output of a re-load counter 15, that is, a clock cut off signal P is set at an (L), and a gate circuit 8 is closed. When a fault is generated in the transmitter from which the clock phi1 is outputted currently and the reception clock phi1 is stopped, then, the (gamma) disappears, and no counter 15 is reset hereafter, and the clock cut off signal P is set at an (H), and the gate 8 is opened, then, the clock phi1 from the clock generation circuit 9 is outputted to a clock bus 10 via the two-way buffer 13. |
