| 摘要 |
PURPOSE:To reduce soft error by providing element forming region by removing a second insulating film formed on a first insulating film, forming a silicon layer within this element forming region and determining level difference of insulating film with thickness of the second insulating film. CONSTITUTION:A silicon oxide film 2 is deposited on a P-type silicon substrate 1 with face orientation 100 and then a silicon nitride film 3 is deposited. Next, the Si3N4 film of the desired region is removed and a rectangular element forming region 20 is formed. Thereafter, a mask 4 having an aperture is formed and an aperture 5 is provided by etching only the SiO2 film 2. Next, a silicon layer 6 which reaches the surface of Si3N4 film 3 is formed by epitaxial growth of Si from the aperture. Next, after etching the silicon layer 6 which is higher than the Si3N4 film 3, a gate oxide film 7 is formed, a polycrystalline silicon film including phosphorus of high concentration is deposited and a gate electrode 8 is formed. Thereafter, arsenic is implanted, an interlayer insulating film 10 is formed after forming a source drain region 9 to the silicon layer 6, and an Al wiring 11 is formed by opening a contact hole. Thereby, elements can be easily isolated and soft error by the parasitic capacitance and alpha-ray can be reduced.
|
